UnnamedOS
isr.h
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1 
7 #ifndef INTERRUPTS_ISR_H
8 #define INTERRUPTS_ISR_H
9 
10 #include <stdint.h>
11 
12 #define ISR_EXCEPTION(ex) (0x00 + (ex))
13 #define ISR_IRQ(irq) (0x20 + (irq))
14 #define ISR_SYSCALL 0x30
15 
16 
17 typedef union {
18  struct {
19  uint8_t cf : 1,
20  reserved : 1,
21  pf : 1,
22  : 1, af : 1,
23  : 1, zf : 1,
24  sf : 1,
25  tf : 1,
26  _if : 1,
27  df : 1,
28  of : 1,
29  iopl : 2,
30  nt : 1,
31  : 1, rf : 1,
32  vm : 1,
33  ac : 1,
34  vif : 1,
35  vip : 1,
36  id : 1;
37  } __attribute__((packed)) bits;
38  uint32_t dword;
39 } isr_eflags_t;
40 
42 typedef struct {
43  uint32_t edi,
44  esi,
45  ebp,
46  esp,
47  ebx,
48  edx,
49  ecx,
50  eax;
51 } __attribute__((packed)) isr_registers_t;
52 
58 typedef struct {
59  // segment registers
60  uint16_t gs,
61  : 16, fs,
62  : 16, es,
63  : 16, ds,
64  : 16;
67  isr_registers_t r;
68  uint32_t intr,
69  error,
70  eip;
71  uint16_t cs,
72  : 16;
74  uint32_t user_esp,
75  user_ss;
76  // These are only popped upon entering a VM86 task.
77  uint16_t vm86_es,
78  : 16, vm86_ds,
79  : 16, vm86_fs,
80  : 16, vm86_gs,
81  : 16;
82 } __attribute__((packed)) cpu_state_t;
83 
90 typedef cpu_state_t* (*isr_handler_t)(cpu_state_t* cpu);
91 
106 typedef uint32_t (*isr_syscall_t)(uint32_t ebx, uint32_t ecx, uint32_t edx,
107  uint32_t esi, uint32_t edi, cpu_state_t** cpu);
108 
109 uint8_t isr_enable_interrupts(uint8_t enable);
110 uint8_t isr_get_interrupts();
111 void isr_register_handler(size_t intr, isr_handler_t handler);
112 void isr_register_syscall(size_t eax, void* syscall);
113 void isr_dump_cpu(cpu_state_t* cpu);
114 void isr_init();
115 
116 #endif
117 
void isr_dump_cpu(cpu_state_t *cpu)
Dumps a CPU state.
Definition: isr.c:123
uint8_t isr_enable_interrupts(uint8_t enable)
Enables or disables interrupts.
Definition: isr.c:42
general purpose registers
Definition: isr.h:42
cpu_state_t *(* isr_handler_t)(cpu_state_t *cpu)
Handles a specific interrupt.
Definition: isr.h:90
The CPU&#39;s state when an interrupt occurs.
Definition: isr.h:58
uint16_t vm86_gs
GS register (only pushed and popped in VM86 mode)
Definition: isr.h:77
uint32_t esp
stack pointer register
Definition: isr.h:43
uint32_t user_ss
stack segment (only pushed and popped in user space)
Definition: isr.h:74
void isr_register_handler(size_t intr, isr_handler_t handler)
Registers a handler to call whenever a given interrupt is fired.
Definition: isr.c:66
void isr_init()
Initializes syscalls and enables interrupts.
Definition: isr.c:152
void isr_register_syscall(size_t id, void *syscall)
Registers a syscall handler to call whenever a specified syscall is requested.
Definition: isr.c:80
uint16_t isr_eflags_t eflags
the EFLAGS register before the interrupt was fired
Definition: isr.h:71
The EFLAGS register.
Definition: isr.h:17
uint32_t intr
the interrupt vector of the fired interrupt
Definition: isr.h:68
uint32_t(* isr_syscall_t)(uint32_t ebx, uint32_t ecx, uint32_t edx, uint32_t esi, uint32_t edi, cpu_state_t **cpu)
Handles a specific syscall.
Definition: isr.h:106
uint8_t isr_get_interrupts()
Returns whether interrupts are enabled or disabled.
Definition: isr.c:55
Definition: stdint.h:22
uint16_t isr_registers_t r
The general purpose registers.
Definition: isr.h:60